Director of Design Verification - Remote Opportunity

About the Role

We are excited to announce a unique opportunity for a Director of Design Verification to join Astera Labs in a remote capacity. As a leader in AI infrastructure, Astera Labs is committed to providing cutting-edge connectivity solutions that empower organizations to harness the full potential of modern AI. In this role, you will leverage your extensive experience in design verification to lead a talented team and ensure the success of our flagship products.

What You'll Do

• Own and drive the end-to-end verification methodology for a specific product line, ensuring first-pass silicon success for complex SoC designs.
• Lead, mentor, and grow a team of engineers, fostering technical excellence and innovation in verification processes.
• Guide verification of industry-standard protocols such as PCIe and CXL across Physical, Link, and Transaction layers.
• Champion advanced methodologies including UVM, formal verification, and AI-augmented flows to enhance efficiency and coverage closure.
• Collaborate closely with RTL design, architecture, and software teams to debug, refine, and optimize verification processes.
• Represent verification in executive reviews, customer engagements, and industry forums, showcasing our commitment to excellence.
• Shape workforce transformation by building hybrid skill sets and preparing the team for AI-driven verification challenges of the 2030s.

Requirements

• Bachelor’s degree in Electrical or Computer Engineering (Master’s preferred).
• 15+ years of experience in design verification, with a proven track record of leading teams and delivering complex SoC/silicon products.
• Deep expertise in PCIe/CXL protocols (Gen3 and above) and experience with third-party Verification IPs.
• Strong background in UVM-based test plan development, assertions, coverage analysis, and abstraction layer design.
• Demonstrated ability to manage priorities, engage with stakeholders, and drive organizational success.

Nice to Have

• Expertise in verifying PCIe/CXL Physical, Link, and Transaction layers, including compliance for EP/RC.
• Experience with buffering, queuing, and QoS in complex NoC-based SoCs.
• Familiarity with AI-driven verification methodologies and workforce transformation strategies.

What We Offer

• Competitive salary in the range of $180,000 to $220,000 annually.
• Flexible remote work environment that promotes work-life balance.
• Opportunities for professional growth and development in a cutting-edge industry.
• Inclusive company culture that values diversity and innovation.
• Health and wellness benefits to support your well-being.